lm_math_fi
Fixed-point arithmetic for FPGA — a synthesizable VHDL building block for DSP and math datapaths, with a Python reference model verified bit-for-bit against fxpmath.
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Free, open-source VHDL and software libraries for FPGA engineering.
Fixed-point arithmetic for FPGA — a synthesizable VHDL building block for DSP and math datapaths, with a Python reference model verified bit-for-bit against fxpmath.
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Floating-point arithmetic for FPGA in VHDL, using IEEE-754 field conventions — vendor-independent RTL you can inspect, verify, and carry across FPGA families.
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Vendor-independent VHDL utility library — counters, delays, CDC, CRC, arbiters, and sizing helpers, hardened across 20 years of real FPGA designs.
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