Our tools

Advanced code generators

LogiMentor is developing a suite of internal tools to automatically generate VHDL modules, testbenches, and documentation from structured descriptors.

RegiCraft

RegiCraft

AXI4-Lite automatic register map generator. Manually creating register maps is time-consuming and error-prone. RegiCraft automates this process, letting you focus on design — not tedious register management, documentation updates, or low-level code generation.

  • VHDL entity and package generation: supports record I/O, flattened vectors, or register-file ports

  • Generates matching C headers for bare-metal or embedded Linux access

  • Auto-generates HTML documentation

  • Input accepted as plain text or JSON (YAML support planned)

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LUTCraft

LUTCraft

Smart LUT generation for math and signal processing functions. Speed up FPGA development with fine-grained control over precomputed values and auto-generated VHDL code.

  • Multi-region resolution for enhanced accuracy in critical input ranges

  • Supports arbitrary functions (e.g., sqrt, log, sin) over signed/unsigned inputs

  • Configurable fixed-point format: range, width, and quantization

  • Generates VHDL LUTs (RAM or array), index mapping, and self-checking testbenches

  • Use cases: signal interpolation, CORDIC seeds, waveform LUTs, and value converters

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SeriCraft

SeriCraft

Flexible UART interface generator designed to bridge your FPGA designs with external systems through structured serial communication. SeriCraft can be used as custom protocol code generator providing an input file descriptor.

  • Define message formats: headers, fields, CRC, and more

  • Automatically generate VHDL packages, FSMs, and testbenches

  • Supports custom UART parameters and FIFO depth

  • Works with your existing register maps and message specs

  • Optional Add-On: use SeriCraft as a Virtual I/O bridge for live signal access, debug hooks, and runtime control

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Accelerate Your FPGA Workflow

Discover how RegiCraft, LUTCraft, and SeriCraft can automate the most tedious parts of FPGA development — from register maps and LUTs to complete serial interfaces.

Ready to integrate these tools into your design process or need a custom solution? We're here to support you with tailored development, adaptation, and integration services.

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