Production-ready HDL + C drivers + docs from a single register-map description.
From a single register-map descriptor (YAML, JSON or legacy text) RegiCraft emits a full integration package:
/dev/mem, Linux kernel module.X_INTERFACE_INFO attributes (Pro tier and above).RegiCraft is unlocked by a signed license.lic file bound to your machine. Three tiers:
| Capability | Trial | Pro | Enterprise |
|---|---|---|---|
| Register count | up to 8 | unlimited | unlimited |
| Generator runs | 100 | unlimited | unlimited |
| License validity | 30 days | perpetual | perpetual |
| VHDL target | ✓ | ✓ | ✓ |
| SystemVerilog target | — | ✓ | ✓ |
| Vivado Block Design wrapper | — | ✓ | ✓ |
| Bare-metal / UIO / devmem backends | ✓ | ✓ | ✓ |
| Linux kernel module backend | — | — | ✓ |
| Custom AXI widths | — | — | ✓ |
| Get started | Get trial | Get Pro evaluation | Contact for Enterprise |
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pip install regicraft-0.4.0.whl inside a virtual environment.license.lic file — drop it next to the installed package.python -m regicraft -input my_block.yaml. The tool's --help covers the rest.For documentation, bug reports or licensing questions, write to info@logimentor.com or use the contact form.